Technologies


Apparatus and Methods for 3-D Stacking of Thinned Die

Reference#: P02873


Recent trends in modern electronic packaging have stressed the need to preserve substrate surface real estate by stacking components on top of each other. Stacking presents the circuit developer with two major challenges: 1) connecting the various die in the vertical stack and 2) removing the heat, because the power density in a given volume increases rapidly upon stacking.

The invention addresses both of these problems while keeping the stacked component size small. A typical multichip planar assembly using thinned die on an ultrathin, flexible multilayer substrate is shown in Fig. 1. In this cross-sectional view the various thinned integrated circuits are flip-chip mounted using low-profile solder bump technology. As pictured in Fig. 1, the substrate reverse side (non-chip bearing side) has an integral thin-film heat-spreading layer comprising either copper foil or a composite layer containing carbon nanotubes. This heat-spreading layer along with the original substrate is thin and pliable enough to allow circuit bending.

Once the chips are assembled and the substrates are released, the assembly is formed (wound) around a heat-removal buss structure as shown schematically in Fig. 2. The heat-removal buss structure is constructed of metal or a ceramic and/or composite with high thermal conductivity. This structure has multiple fingers, which allow the substrate below each die to come in contact with one of these fingers. The fingers connect to a support member, which provides stability and a means of connecting this heat-removal structure to the ambient.

The assembly in Fig. 2 supports nine stacked die with an overall assembly height of 2.5 to 3 mm. This assumes the thickness of each heat-removal finger is 0.5 mm and has a width of 5 mm. If the heat-removal structure is made from copper (óthermal = 400 W/m*K), then an overall thermal resistance of 10°C/W or less can be achieved from an individual die to the ambient. This would allow each individual die to dissipate up to 1 W while the slack temperature remains at a safe level. Increasing the thickness of the vertical finger connection member could reduce the overall thermal resistance and allow even greater heat dissipation. Once stacked around the heat-removal member, the parts are encapsulated and the special substrate pads set aside for stacked module attachment are bumped, thus completing the part.

The stack can be shortened even further and provide for even greater heat removal by using a double-sided assembly on two thin-film, multilayer substrates with a thin, flexible, heat-spreading layer in between. In this arrangement, the assembly is wound around the heat-removal buss structure in such a manner that the individual die backs are in contact with the heat-removal fingers. This configuration would couple the chip heat directly to the heat-removal fingers. Coupling of the die backs to the heat-removal fingers is achieved by means of a diamond or carbon nanotube-filled material.

Patent Status: U.S. patent(s) 8,466,563 issued.

CONTACT:
Mr. K. Chao
Phone: (443) 778-7927
ott-techmanager6@jhuapl.edu

Additional References:

Link to U.S. Patent and Trademark Office
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