Electroless Gold Plating for Use in Wirebonded Chip-on-Board (COB) and Multichip Module (MCM) Applications
Multi-layer printed circuit boards commonly include conductively plated through holes to provide interconnection between conductive traces on the various layers of the board. Such through holes may run completely through the PCB assembly from one surface to the opposite surface and, thus, be open at both ends. However, techniques are now well established for providing blind vias in multi-layer printed circuit boards. Blind vias are open at one end but terminate short of the opposite surface of the PCB at one of the intermediate layers. Blind vias conserve real-estate on the circuit board since they do not consume space on layers on which they do not serve an electrical function. Also in furtherance of the ever present desire to reduce the size of circuitry, it is desirable for the through holes and blind vias to have as small a diameter as possible. Particularly, blind vias with diameter to depth aspect ratios of 1:1 up to 1:5 or greater are known in the prior art. However, it has been found to be rather difficult to electrolessly gold plate blind vias with aspect ratios of 1:1 or greater. Particularly, it is difficult to guarantee that sufficient exchange of the electroless nickel and/or gold plating solutions into and out of the blind vias to fully plate the surfaces of the blind vias.
The invention is a technique for electrolessly gold plating copper patterns on a PCB or the like that is particularly suited for use in connection with the manufacture of PCBs upon which bare dies will be mounted. Starting with a printed circuit board (PCB) with patterned copper on its surface and in any vias, one particular, complete process in accordance with the current embodiment of the present invention comprises the following steps: 1. Cleaning the PCB in a bath of cleaning solution with the application of ultrasonic agitation with the PCB initially oriented vertically and gradually moved to a 45.degree. angle to the ground followed by rinsing in a high pressure rinse with de-ionized water; 2. Immersing the PCB in a 10% solution of sulfuric acid with the application of ultrasonic and mechanical agitation (if the conductor spacing is less then 5 mils, the solution is reduced to approximately 1 to 5% sulfuric acid); 3. Rinsing in overflowing de-ionized water; 4. Immersing the PCB in a 5% solution of sulfuric acid with the application of ultrasonic and mechanical agitation. This second sulfuric acid wash preferably is not followed by a rinse; 5. Plating the copper with palladium by immersing the PCB in a palladium activation solution at approximately 30.degree. C. with the application of ultrasonic agitation for 5 seconds at 30 second intervals. The PCB should be initially positioned at a 45.degree. angle and be flipped approximately half way through the process to the opposing 45.degree. angle; 6. Rinsing with de-ionized water in an overflowing beaker for approximately 30 seconds; 7. Post dipping in a 1% solution of sulfuric acid to help eliminate bridge plating; 8. Rinsing in overflowing de-ionized water; 9. Immersing in a bath of electroless nickel at approximately 80.degree. C. without ultrasonic agitation, but with mechanical agitation; 10. Rinsing in overflowing de-ionized water; 11. Nitrogen blow drying; 12. Visually inspecting for full nickel coverage of the copper; 13. Immersing in an approximately 30% solution of hydrochloric acid with manual agitation, followed by a overflowing de-ionized water rinse 14. If full nickel coverage was not achieved, repeating steps 4 through 13; 15. Immersing in a gold flash plating solution at approximately 90.degree. and a pH of 4.5 to 4.7 to establish a first thin layer of electroless gold; 16. Rinsing in overflowing de-ionized water; 17. Immersing in an autocatalytic gold plating bath at approximately 70.degree. C. for sufficient time to achieve the desired over all gold thickness; 18. Rinsing in overflowing de-ionized water; 19. Blow drying with dry nitrogen.
Mr. M. T. Hickman