An analog, single integrated circuit for providing centered video images. A light detector array that can be, a CCD or an array of phototransistors or silicon retinas, is scanned out to provide a video signal. Current summing lines along each row and column of the array are used as inputs to x and y position sensitive (computation) circuitry located on the edge of the pixel array. When the array utilizes silicon retinas, an absolute value circuit is added to restore low frequency information removed by the retinas to the current summing output. An on-chip sequencer uses the x and y position outputs to scan out the video image centered to the nearest pixel.
Patent Status: U.S. patent(s) 6,058,223; 6965396 issued.
*JH/APL is seeking development and licensing partners for this technology.CONTACT:
Mr. E. Chalfin
Phone: (443) 778-7473